β-Ga2O3Pseudo-CMOS Monolithic Inverters

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Abstract

In this article, we report on the fabrication of β-Ga2O3 pseudo-CMOS inverters using enhancementmode (E-mode) β-Ga2O3 single-finger (SF) and multifinger (MF) thin-film transistors (TFTs). Initially, single-stage monolithic inverter ICs were fabricated using TFTs having threshold voltages VSF th = 0.6 V and VMF th = 0.1 V. However, the single-stage inverter yielded poorer gain (4.50 at VDD, supply voltage = 3 V). Alternatively, a pseudo-CMOS (double-stage) inverter was designed and fabricated, yielding a maximum gain of 6.45 but with a poor noise margin (NM). To improve the NM, the pseudo-CMOS circuit was tested using TFTs having higher threshold voltages (VSF th = 1.85 V and VMF th = 1.75 V). Notably, the optimized pseudo-CMOS circuit exhibited the least peak power consumption (0.2 nW) and the maximum gain of 8 at VDD = 3 V. The monolithically integrated devices performance and IC highlight this technology s remarkable potential for application in the emerging sector of power electronics and extreme-environment electronics.

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APA

Chettri, D., Mainali, G., Amruth, C., Khandelwal, V., Yuvaraja, S., Xiao, N., … Li, X. (2023). β-Ga2O3Pseudo-CMOS Monolithic Inverters. IEEE Transactions on Electron Devices, 70(10), 5051–5056. https://doi.org/10.1109/TED.2023.3305338

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