Design of 6 nm double gate MOSFET and its circuit level applications

Abstract

This study introduces the virtual fabrication and electrical characteristics of a 6 nm double-gate transistor, utilizing Hafnium Dioxide (HfO₂) as the high-k dielectric material and Indium Gallium Arsenide (InGaAs), Slicon Germenum (SiGe), Gallium Nitride (GaN) as the substrate. A comparative analysis of SiGe, InGaAs and GaN as substrate materials is performed. For low-power security circuit applications, this article provides a thorough performance analysis of Double Gate Metal-Oxide-Semiconductor Field-Effect Transistors (DG MOSFETs). With the increasing demand for energy-efficient electronic devices, semiconductor technologies are continually evolving to meet these requirements. InGaAs offer improved gate capacitance and reduced leakage current, making them attractive candidates for enhancing the performance of DG MOSFETs in low-power applications. Based on the simulation results, the optimal values of threshold voltage (VTH) is 0.66 V, drive current (ION) is 2.4 × 10−3 A/µm, leakage current (IOFF) is 3.59 × 10–12 A/µm, Drain Induced Barrier Lowering (DIBL) is 0.08 mV/V and subthreshold slope (SS) is 70.76 mV/dec. The device operates satisfactorily when the suggested work is compared to the current one. The 6 nm DG-MOSFET, which exhibits greater efficiency with reduced power consumption and less latency, is used to build a security-based encryption method. In circuit-level applications, the lower power consumption and more effective operation enable the addition of an additional hardware-based security layer, thereby preventing unwanted access. Nanoscale security circuits allow the development of smaller and more compact devices, such as in wearable technology, autonomous vehicles or embedded IoT devices.