Fully roll-to-roll gravure printed electronics: Challenges and the way to integrating logic gates

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Abstract

Printed electronics have been considered to bring about the ICT (Information Communication Technology) revolution. The high-throughput production of the ultra-low-cost printed devices along with the level of integration of logic gates via an all roll-to-roll (R2R) printing method has been the major axes in the revolution. However, there have been certain concerns related to the integration of logic gates via the R2R printing methods. This review paper focuses on the key issues that must be resolved to maintain a uniform threshold voltage (V th) value, which can otherwise impede the commercial viability of such devices. Amongst the various factors contributing to the "V th value, the ink rheology, web handling, and the disparity in alignment amongst the drain-source electrodes and the gate electrodes due to the limitations of an overlay printing registration accuracy (OPRA) were reviewed to effectively control the variations during the R2R printing process, without including the material's intrinsic instability factors. Accordingly, a unique design rule for the R2R printing foundry concept was introduced for manufacturing the devices with the available integration level of the logic gates, incorporating the printing parameters including ink rheology, ink transfer, web handling, and OPRA.

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Tiara, A. M., Moon, H., Cho, G., & Lee, J. (2022, June 1). Fully roll-to-roll gravure printed electronics: Challenges and the way to integrating logic gates. Japanese Journal of Applied Physics. IOP Publishing Ltd. https://doi.org/10.35848/1347-4065/ac575e

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