High-data-rate FSK demodulator for wireless communication

Abstract

A low-power frequency-shift keying (FSK) demodulator capable of demodulating 5 Mbit/s data rate is presented. No high sampling clock is needed in this demodulator design, and thus the design not only greatly reduces the circuit complexity but also achieves a high data rate. It is suitable for a digital data transmission chain of wireless communication. © The Institution of Engineering and Technology 2013.