Generic Cryogenic CMOS Device Modeling and EDA-Compatible Platform for Reliable Cryogenic IC Design

Abstract

This paper outlines the establishment of a generic cryogenic CMOS database in which key electrical parameters and transfer characteristics of the MOSFETs are quantified as functions of device size, temperature/frequency responses. Meanwhile, comprehensive device statistical analysis is conducted to evaluate the influence of variation and mismatch effects at low temperatures. Furthermore, by incorporating the Cryo-CMOS compact model into the process design kit (PDK), the cryogenic 4 Kb SRAM and 5-bit flash ADC are designed, and their performance is investigated and optimized based on the EDA-compatible platform, hence laying a solid foundation for large-scale cryogenic IC design.