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Planarization polishing technique for large diameter of bare silicon wafer

Seimitsu Kogaku Kaishi/Journal of the Japan Society for Precision Engineering (2007) 73(7) 756-759
DOI: 10.2493/jjspe.73.756
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Arai, H. (2007). Planarization polishing technique for large diameter of bare silicon wafer. Seimitsu Kogaku Kaishi/Journal of the Japan Society for Precision Engineering, 73(7), 756–759. https://doi.org/10.2493/jjspe.73.756

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