Digital Filter Architecture with Calculations in the Residue Number System by Winograd Method F (2 × 2, 2 × 2)

Abstract

Improving the technical characteristics of digital signal processing devices is an important problem in many practical tasks. The paper proposes the architecture of a device for two-dimensional filtering in a residue number system (RNS) with moduli of a special type according to the Winograd method. The work carried out the technical parameters theoretical analysis of the proposed filter architecture for different RNS moduli sets by the 'unit-gate'-model. In addition, the proposed architecture is compared with known digital filter implementations. The theoretical analysis results showed that the use of the proposed filter architecture makes it possible to increase the signal processing speed by 1.33-6.90 times, in comparison with the known device implementations. Also, in the work, the hardware simulation of the proposed filter architecture was performed on FPGA, which showed that the performance of the proposed device is 1.31-4.12 times higher than known digital filter architectures. The research results can be used in digital signal processing systems to increase their performance and reduce hardware costs. In addition, the developed architectures can be applied in the development of hardware accelerators for complex digital signals analysis systems.