Design and implementation of a new multilevel push pull inverter topology

Abstract

The paper presents simulation and experimental results of a novel multilevel push pull inverter based multi-winding transformer. In the presented topology the most important advantage is that only one DC voltage source is used for generating the multilevel stepwise waveform in output voltage. Also, the number of switches in the suggested topology is reduced respect to conventional multilevel inverters. In the suggested inverter only one switch will be turn on in each interval and so the conduction losses of converter will decrease. The selective harmonic elimination (SHE) method is used for generating the gate pulses. Therefore the converter losses include switching losses and conducting losses, are reduced and so the eficiency of inverter is increased. Design procedure of transformer turn ratio is presented in this paper. The suggested topology is proposed to be a proper choice in low voltage, PV and dynamic voltage restorer (DVR) applications. The presented simulation and experimental results show the validity and efiectiveness of proposed topology.