A TCB algorithms for wear leveling method in FTL-based NAND flash memory

Abstract

Flash memory has the advantages of fast access speed, low power consumption, and low price. Therefore, it is widely used in many sectors of the electronics industry. However, the flash memory also has a disadvantage of a limited number of program/erase (P/E) cycles. Many wear-leveling techniques have been studied to prolong the lifetime of flash memory by equalizing the P/E cycles of the blocks. In this paper, we propose a novel wear-leveling technique called “tracking cold block” (TCB), which enhances a bit-set threshold. To enhance the accuracy of cold block information, we used a cold erase table (CET), which is calculated using the number of invalid pages of the blocks in a one-to-many mode, where one bit is related to many blocks. The experimental performance results illustrate that TCB prolongs the lifetime of flash memory by up to 70% compared with previous wear-leveling techniques.