Abstract
As the compactness of system-on-chip (SoC) increase, it becomes striking to integrate dedicated test logic on a chip. Starting with a broad idea of test problems, this survey paper focus on "Chip" Built in Self-Test (BIST) study and its promotion for board and system-level applications. This paper gives brief informative review of Built-in Self-test (BIST) and its testing techniques. Recently BIST Research is being highly used in VLSI and SoC testing for the detection fault coverage.
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CITATION STYLE
Shrivastava, S., Rawat, P., & Malviya, S. (2017). Testing Technique of BIST: A Survey. International Journal of Computer Applications, 161(3), 22–25. https://doi.org/10.5120/ijca2017913133
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