Electro-Optical Co-Design of Power-Efficient 100-Gbps/λ VCSEL Transmitter

Abstract

In this paper, we propose a comprehensive electro-optical co-design framework for power-efficient high-speed VCSEL transmitter targeting at 50 Gbaud. The framework integrates a rate-equation based VCSEL chip model and driver circuit models. Subject to the transmitter specifications defined by IEEE 400G standard, the driver circuit design of NRZ and PAM-4 modulations, together with the energy efficiency of transmitter, is analyzed and compared for two types of 20-GHz class VCSELs with different damping factors while keeping the same parasitic parameters. For NRZ modulation, analysis results indicate that both types of VCSEL transmitters show similar achievable data rate and energy efficiency. Both types of VCSEL transmitters are beneficial with small driver resistance in order to achieve high-speed signaling integrity. The best energy efficiency for both types of VCSEL transmitters is 520.8 fJ/bit under NRZ modulation. For PAM-4 modulation, higher achievable data rate can be reached by the over-damped VCSEL transmitter compared with the under-damped one, for which trade-offs of choosing the appropriate driver parameters are required for high-speed operation. The optimized over-damped VCSEL transmitter can have 16.13% higher achievable data rate and around 4.12% of energy efficiency improvement compared with the under-damped counterpart, but the signal quality is more sensitive to driver parameters. The best energy efficiencies are 365.1 fJ/bit and 380.8 fJ/bit for the over- and under-damped VCSEL transmitter under PAM-4 modulation. This co-design framework can provide a guidance in the VCSEL enabled co-packaging design.