Random stimuli generation for functional hardware verification as a CP application

Abstract

Functional verification of modern hardware design consumes roughly 70% of the effort invested in the design cycle. Simulation of randomly generated stimuli is the main means of achieving functional verification. A typical verification effort is centered around a stimuli generator which produces a massive amount of test cases that are simulated on the verified design. Bugs are then identified when the design behaves incorrectly, (in some cases this process is complemented by some amount of formal verification). In the past few years it became clear across the industry that the most powerful way of generating high-quality stimuli is by utilizing constraint technology. This is because constraints allow for a natural description of hardware systems [1]. Hence, CP is now at the core of all leading verification environments [2]. CSP's arising from stimuli generation are different from other application domains. One striking difference is the existence of variables with huge (e.g. 264) domains, combined with highly non-linear and non-monotonic constraints. Another is the requirement to produce multiple different solutions, distributed roughly uniformly, for the same CSP. Further, the complexity of the design, and its tendency to change over time, requires a sophisticated modeling capability. We discuss and demonstrate these and other issues related to stimuli generation, including the modeling and solution of conditional problems [3] and of generative CSPs, both of which abound in this domain. We demonstrate complex stimuli-generation scenarios which are solvable by our special purpose engine, as well as other important scenarios, which are currently not solvable in a reasonable time. The latter impose the challenges of current research. The constraint engine we demonstrate is being developed at IBM for more than a decade, and is at the core of the stimuli generators used for the functional verification of all of IBM's high-end processors and systems [4,5]. © Springer-Verlag Berlin Heidelberg 2005.