Resistorless BJT bias and curvature compensation circuit at 3.4 nW for CMOS bandgap voltage references

Abstract

A novel resistorless bipolar junction transistor (BJT) bias and curvature compensation circuit for ultra-low-power CMOS bandgap voltage references (BGRs) is introduced. It works in the nanoampere current consumption range and under 1 V of power supply. The analytical behaviour of the circuit is described and simulation results for a 0.18 μm CMOS standard process are analysed. A junction voltage of 550 mV at room temperature is obtained (at an emitter current of 3.5 nA), presenting an almost linear temperature dependence, whereas the power consumption of the whole circuit is 3.4 nW under a 0.8 V power supply at 27°C. The estimated silicon area is 0.00135 mm2. © The Institution of Engineering and Technology 2014.