Optimization of control block of 3-bit PWM using adiabatic dynamic CMOS logic for OLED illumination system based on internet of things service

Abstract

The environment development for deep sleep has been studied using analysis results of the big data about vital signs and parameters in the bedroom. The organic light emitting diode (OLED) illuminations of the bedroom are dimming using analysis results of the big data. Therefore, a low-power and compact design of dimming part is required for OLED illumination system. In this paper, the optimized control block of the clock cut-off circuit was designed using De Morgan's laws with adiabatic dynamic CMOS logic (ADCL) digital 3-bit pulse width modulation (PWM). The designed clock cut-off circuit pauses the D-flipflops (D-ffs) after cutting off the clock at both 0 % and 100 % pulse width of PWM output for dimming. As a result, 10 transistors of the miniaturized control block were reduced and layout area of the optimized control block is 2,198.0μm2 using Rohm 0.18μm standard CMOS model .The operation of control block of clock cut-off circuit with ADCL 3-bit digital PWM is confirmed by post-simulation of hspice.