Abstract
Advances in interconnect technologies for system-in-package manufacturing have re-introduced multi-chip module (MCM) architectures as an alternative to the current monolithic approach. MCMs or multi-die systems implement multiple smaller chiplets in a single package. .ese MCMs are connected through various package interconnect technologies, such as current industry solutions in AMD's In.nity Fabric, Intel's Foveros active interposer, and Marvell's Mochi Interconnect. Although MCMs improve manufacturing yields and are cost-e.ective, additional challenges on the Network-on-Chip (NoC) within a single chiplet and across multiple chiplets need to be addressed. .ese challenges include routing, scalability performance, and resource allocation. .is work introduces a scalable MCM 3D interconnect infrastructure called ''MCM-3D-NoC'' with multiple 3D chiplets connected through an active interposer. System-level simulations of MCM-3D-NoC are performed to validate the proposed architecture and provide performance evaluation of network latency, throughput, and EDP.
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CITATION STYLE
Pano, V., Kuttappa, R., & Taskin, B. (2019). 3d nocs with active interposer for multi-die systems special session paper. In Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2019. Association for Computing Machinery. https://doi.org/10.1145/3313231.3352380
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