Efficiency of low-power design techniques in multi-gate FET CMOS circuits

Abstract

Energy dissipation, performance, and voltage scaling of Multi-Gate FET (MuGFET) based CMOS circuits are analyzed using product-representative test circuits composed of 10k devices. The circuits are fabricated in a low power MuGFET CMOS technology, achieve clock frequencies of 370-500MHz at V DD=1.2V, and operate down to the subthreshold region. Voltage scalability of MuGFET circuits is superior to sub-100nm planar CMOS circuits due to excellent short-channel effect control. ©2007 IEEE.