Modeling and Design of FTJs as Multi-Level Low Energy Memristors for Neuromorphic Computing

Abstract

An in-house modeling framework for Ferroelectric Tunnelling Junctions (FTJ) is here presented in details. After a precise calibration again experiments, the model is exploited for an insightful study of the design of FTJs as synaptic devices for neuromorphic networks. Our analysis explains and addresses the tradeoff between the reading efficiency and the effects of the depolarization field during the retention phase. The reported results show that a moderately low- $\kappa $ tunnelling dielectric (e.g., SiO2) can increase the read current and the current dynamic range. The study shows also how the contribution of trapped charge may favor the stabilization of the polarization inside the FTJ, but also reduces the maximum read current.