Effects of NO Annealing and GaO[sub x]N[sub y] Interlayer on GaN Metal-Insulator-Semiconductor Capacitor with SiO[sub 2] Gate Dielectric

Abstract

SiO2 was deposited on GaN by radio-frequency sputtering to fabricate metal-insulator-semiconductor (MIS) capacitors. Before the deposition, an ultrathin GaOxNy interlayer was thermally grown on the GaN wafer to improve the quality of the insulator/GaN interface. The interface-trap density at 0.4 eV below the conduction bandedge was reduced by one order compared with that of a sample without the GaOxNy interlayer. Annealing in NO gas at 800 C was conducted on both samples, and turned out to greatly suppress their oxide charges. The NO-annealed sample with the GaOxNy interlayer achieved the lowest oxide-charge density of 1.7 x 10(11) cm(-2), as compared to 9.5 x 10(11) cm(-2) for its counterpart without the GaOxNy interlayer and about 8.0 x 10(12) cm(-2) for the two nonannealed samples. Moreover, the NO annealing was found to effectively reduce border traps. Secondary-ion mass spectrometry analysis was performed to explain how the GaOxNy interlayer and NO annealing affect the performance of the GaN MIS capacitors. (c) 2007 The Electrochemical Society.