Stereovision Algorithm to be Executed at 100Hz on a FPGA-Based Architecture

Michel Devy; Jean-Louis Boizard; Diego Botero; Henry Carrillo; Mario Ibarra; Zohir Irki; Abdelelah Naoulou; Pierre Lacroix; Philippe Fillatreau; Jean-Yves Fourniols; Carlos Parra

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Stereovision Algorithm to be Executed at 100Hz on a FPGA-Based Architecture

Devy M
Boizard J
Botero D
et al.

InTech, (2011)

DOI: 10.5772/14037

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Abstract

Michel Devy1 * , Jean-Louis Boizard2, Diego Botero Galeano3, Henry Carrillo Lindado4, Mario Ibarra Manzano5, Zohir Irki6, Abdelelah Naoulou7, Pierre Lacroix8, Philippe Fillatreau9, Jean-Yves Fourniols10, Carlos Parra11 1,2,3,5,6,7,8,10CNRS; LAAS; 7 avenue du Colonel Roche, F-31077 Toulouse Universite de Toulouse; UPS, INSA, INP, ISAE; LAAS-CNRS : F-31077 Toulouse 3,4,11Pontificia Universidad Javeriana; Carrera 7 No. 40-62; Bogota 9Delta Technologies Sud Ouest; 2 Impasse Michel Labrousse, 31036 Toulouse 1,2,3,5,6,7,8,9,10France 3,4,11Columbia

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Devy, M., Boizard, J.-L., Botero, D., Carrillo, H., Ibarra, M., Irki, Z., … Parra, C. (2011). Stereovision Algorithm to be Executed at 100Hz on a FPGA-Based Architecture. In Advances in Theory and Applications of Stereo Vision. InTech. https://doi.org/10.5772/14037

Stereovision Algorithm to be Executed at 100Hz on a FPGA-Based Architecture

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