Design, analysis, and implementation of analog complex filter for low-IF wireless LAN application

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Abstract

The design and implementation of an analog complex filter for low-IF WLAN 802.11a receiver is described. An IF of 20MHz is chosen as a trade off between image-rejection and power consumption. The specified bandwidth is 20MHz. Baseband processing requires low group-delay variation in the received signal to meet bit error rate (BER) specification. This requires a design of high frequency, wide bandwidth and high attenuation filter. To resolve these issues, fifth-order complex transitional Bessel-Chebyshev filter is implemented to compromise between high attenuation and low group-delay variation. Measured results show the designed filter provides 30dB to 40dB image rejection and 18dB adjacent channel rejection, while keeping a low group-delay variation of below 6.0ns within the pass-band. High frequency and wide bandwidth filter also requires stringent design specification of the circuitries. Differential inverter transconductor is optimized for this continuous-time filter design. The complete filter including on-chip tuning circuit and bandgap consumes only 7.5mA with 1.8V single supply voltage. The circuit is fabricated using 0.18 μm, 6-metal-single-poly CMOS process.

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APA

Teo, T. H., Khoo, E. S., Uday, D., & Tear, C. B. (2004). Design, analysis, and implementation of analog complex filter for low-IF wireless LAN application. In Proceedings of the IEEE International Conference on VLSI Design (Vol. 17, pp. 416–421). https://doi.org/10.1109/icvd.2004.1260958

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