Cascaded-Type Band Alignment of a WBG Perovskite/NBG Perovskite For Heterostructure Solar Cells

Abstract

The performance of single-junction mixed-halide perovskite-based solar cells is limited by thermalization and spectral losses. With advanced device architectures, the perovskite/perovskite heterostructure, where two or more photoactive layers are stacked together, can help to minimize these losses. In this work, we conformally transfer printed a narrow-band-gap perovskite over a spin-coated wide-band-gap perovskite layer to form a perovskite/perovskite heterostructure. This heterostructure results in broader spectral coverage and the higher position of the lowest unoccupied molecular orbital (LUMO) level of MAPbBrxI3-x compared to MA0.7FA0.3Pb0.5Sn0.5I3, forming a cascaded energy level alignment between photoactive layers. Additionally, direct evidence of improved morphology has been observed with the transfer-printing technique in heterostructure formation. The bottom layer provides favorable assistance for the growth of the top perovskite near the interface with good coverage and maintains the quality of the film. Thus, the increased crystallinity and reduced grain boundaries lead to less defects. This reduction played a key role in suppressing recombination losses at the interfaces, ultimately leading to improved device performance. These inherent properties have a positive impact on the photovoltaic response of the device, resulting in broader spectral response and power conversion efficiencies (PCEs) of 14.76% in the heterostructure device. A notable improvement is achieved compared to control single-junction devices, which typically have a PCE of nearly 10% with printed-Sn and 12% with spin-Br-based devices. Moreover, the heterostructure-based device exhibits high stability, retaining almost 80% of its initial PCE value for almost 1000 h with proper encapsulation. Our technique can be utilized for designing low-temperature and solution-processed stacked layers, applicable for optoelectronic devices, including light-emitting diodes (LEDs), sensors, and transistors, where dissolution issues often pose limitations to device architecture.