The Area-Time Complexity of Binary Multiplication

Abstract

The problem of performing multtphcaUon of n-bit binary numbers on a chip is considered Let A denote the chp area and T the time reqmred to perform multphcation. By using a model of computation which is a realistic approxmauon to current and anucipated LSI or VLSI technology, t is shown that [formula-omitted] where A and To are posmve constants which depend on the technology but are mdependent of n. The exponent 1 + a is the best possible A consequence of this result is that binary multiphcatlon is “harder” than binary addmon More precisely, ff(AT2)M(n) and (AT2)A(n) denote the mmimum area-time complexity for n-b~t binary multiphcauon and addmon, respectively, then [formula-omitted]. © 1981, ACM. All rights reserved.