Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process

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Abstract

A p-type ternary logic device with a stack-channel structure is demonstrated using an organic p-type semiconductor, dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT). A photolithography-based patterning process is developed to fabricate scaled electronic devices with complex organic semiconductor channel structures. Two layers of thin DNTT with a separation layer are fabricated via the low-temperature deposition process, and for the first time, p-type ternary logic switching characteristics exhibiting zero differential conductance in the intermediate current state are demonstrated. The stability of the DNTT stack-channel ternary logic switch device is confirmed by implementing a resistive-load ternary logic inverter circuit.

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Lee, Y., Kwon, H., Kim, S. M., Lee, H. I., Kim, K., Lee, H. W., … Lee, B. H. (2023). Demonstration of p-type stack-channel ternary logic device using scalable DNTT patterning process. Nano Convergence, 10(1). https://doi.org/10.1186/s40580-023-00362-w

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