Abstract
Interlayer lithography is used to pattern highly conductive, solution-processed, reduced graphene oxide source and drain electrodes down to 10 μm gaps. These patterned electrodes allow for the fabrication of high-performance organic thin-film transistors and complementary circuits. The method offers a viable route towards organic electronics fabricated entirely by solution processing. Copyright © 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
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CITATION STYLE
Wöbkenberg, P. H., Eda, G., Leem, D. S., De Mello, J. C., Bradley, D. D. C., Chhowalla, M., & Anthopoulos, T. D. (2011). Reduced graphene oxide electrodes for large area organic electronics. Advanced Materials, 23(13), 1558–1562. https://doi.org/10.1002/adma.201004161
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