Throughput analysis for a high-performance FPGA-accelerated real-time search application

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Abstract

We propose an FPGA design for the relevancy computation part of a high-throughput real-time search application. The application matches terms in a stream of documents against a static profile, held in off-chip memory. We present a mathematical analysis of the throughput of the application and apply it to the problem of scaling the Bloom filter used to discard nonmatches. Copyright © 2012 Wim Vanderbauwhede et al.

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Vanderbauwhede, W., Chalamalasetti, S. R., & Margala, M. (2012). Throughput analysis for a high-performance FPGA-accelerated real-time search application. International Journal of Reconfigurable Computing, 2012. https://doi.org/10.1155/2012/507173

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