Abstract
This study presents a wideband low noise amplifier (LNA) including electrostatic discharge (ESD) protection circuits using 65 nm CMOS with a gate oxide thickness of only ∼2nm. By co-designing the ESD blocks with the core circuit, the LNA shows almost no performance degradation compared to the reference design without ESD. Under a power consumption of only 6.8 mW, the silicon results show that the LNA can achieve a peak power gain of 13.8 dB. Within the 3 dB bandwidth from 2.6 GHz to 6.6 GHz, the noise figure (NF) is in a range of 4.0 dB to 6.5 dB and the input reflection coefficient S11is below -13.0 dB. Using the miniaturized Shallow-Trench-Isolation (STI) diode of ∼40fF capacitance and a robust gate-driven power clamp configuration, the proposed LNA demonstrates an excellent 4 kV human body mode (HBM) ESD performance, which has the highest voltage/capacitance ratio ( ∼100 V/fF) among the published results for RF LNA applications. © 2006 IEEE.
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Tsai, M. H., Hsu, S. S. H., Hsueh, F. L., Jou, C. P., Chen, S., & Song, M. H. (2009). A wideband low noise amplifier with 4 kV HBM ESD protection in 65 nm RF CMOS. IEEE Microwave and Wireless Components Letters, 19(11), 734–736. https://doi.org/10.1109/LMWC.2009.2032019
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