FPGA design and implementation of modified AES based encryption and decryption algorithm

Abstract

Advanced Encryption Standard (AES) is an endorsed cryptographic algorithm that can be utilized to secure electronic information. AES was replacing the old Data Encryption Standard (DES) with more security. The algorithm uses a combination of logical EX-OR operations, octet substitution with S-BOX, column rotations, row rotations, and a mix column. It was successful because it was easy to implement and could run in a reasonable amount of time on a regular computer. Field Programmable Gate Arrays (FPGA) offers a faster, increasingly adjustable arrangement. In this paper, another plan of AES that is triple key AES is proposed. This beats the powerlessness of static S-Boxes and furthermore single key and double key AES encryption conspire. Thus the triple key AES calculation is more grounded when contrasted with the both past cases and give greater security to the information, pictures and etc. Finally we tested this algorithm on Spartan 3E FPGA kit.