Aerial imaging technology for photomask qualification: From a microscope to a metrology tool

Abstract

Photomasks carry the structured information of the chip designs printed with lithography scanners onto wafers. These structures, for the most modern technologies, are enlarged by a factor of 4 with respect to the final circuit design, and 20 - 60 of these photomasks are needed for the production of a single completed chip used, for example, in computers or cell phones. Lately, designs have been reported to be on the drawing board with close to 100 of these layers. Each of these photomasks will be reproduced onto the wafer several hundred times and typically 5000 - 50 000 wafers will be produced with each of them. Hence, the photomasks need to be absolutely defect-free to avoid any fatal electrical shortcut in the design or drastic performance degradation. One well-known method in the semiconductor industry is to analyze the aerial image of the photomask in a dedicated tool referred to as Aerial Imaging Measurement System, which emulates the behavior of the respective lithography scanner used for the imaging of the mask. High-end lithography scanners use light with a wavelength of 193 nm and high numerical apertures (NAs) of 1.35 utilizing a water film between the last lens and the resist to be illuminated (immersion scanners). Complex illumination shapes enable the imaging of structures well below the wavelength used. Future lithography scanners will work at a wavelength of 13.5 nm [extreme ultraviolet (EUV)] and require the optical system to work with mirrors in vacuum instead of the classical lenses used in current systems. The exact behavior of these systems is emulated by the Aerial Image Measurement System (AIMS ™ ; a Trademark of Carl Zeiss). With these systems, any position of the photomask can be imaged under the same illumination condition used by the scanners, and hence, a prediction of the printing behavior of any structure can be derived. This system is used by mask manufacturers in their process flow to review critical defects or verify defect repair success. In this paper, we give a short introduction into the lithography roadmap driving the development cycles of the AIMS systems focusing primarily on the complexity of the structures to be reviewed. Second, we describe the basic principle of the AIMS technology and how it is used. The last section is dedicated to the development of the latest generation of the AIMS for EUV, which is cofinanced by several semiconductor companies in order to close a major gap in the mask manufacturing infrastructure and the challenges to be met.