Abstract
A structure is proposed that makes it possible to shrink cell size without scaling of device dimensions. The NAND structure cell realizes a cell as small as 6. 43 mu m**2 using a 1. 0- mu m design rule. As a result, cell area per bit can be reduced by 30% compared with that of a 4-Mb EPROM using the conventional structure and the same design rule. It is found that each bit in a NAND cell is able to be programmed selectively. This high-performance NAND-structure cell is applicable to high-density nonvolatile memories as large as 8 Mb.
Cite
CITATION STYLE
Masuoka, F., Momodomi, M., Iwata, Y., & Shirota, R. (1987). NEW ULTRA HIGH DENSITY EPROM AND FLASH EEPROM WITH NAND STRUCTURE CELL. In Technical Digest - International Electron Devices Meeting (pp. 552–555). IEEE. https://doi.org/10.1109/iedm.1987.191485
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