High-performance on-chip silicon beamsplitter based on subwavelength metamaterials for enhanced fabrication tolerance

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Abstract

Efficient power splitting is a fundamental functionality in silicon photonic integrated circuits, but state-of-the-art power-division architectures are hampered by limited operational band-width, high sensitivity to fabrication errors or large footprints. In particular, traditional Y-junction power splitters suffer from fundamental mode losses due to limited fabrication resolution near the junction tip. In order to circumvent this limitation, we propose a new type of high-performance Y-junction power splitter that incorporates subwavelength metamaterials. Full three-dimensional sim-ulations show a fundamental mode excess loss below 0.1 dB in an ultra-broad bandwidth of 300 nm (1400–1700 nm) when optimized for a fabrication resolution of 50 nm, and under 0.3 dB in a 350 nm extended bandwidth (1350–1700 nm) for a 100 nm resolution. Moreover, analysis of fabrication tol-erances shows robust operation for the fundamental mode to etching errors up to ± 20 nm. A proof-of-concept device provides an initial validation of its operation principle, showing experimental excess losses lower than 0.2 dB in a 195 nm bandwidth for the best-case resolution scenario (i.e., 50 nm).

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Fernández de Cabo, R., González-Andrade, D., Cheben, P., & Velasco, A. V. (2021). High-performance on-chip silicon beamsplitter based on subwavelength metamaterials for enhanced fabrication tolerance. Nanomaterials, 11(5). https://doi.org/10.3390/nano11051304

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