High-speed low-power digital-to-analog converter using InP heterojunction bipolar transistor technology for next-generation optical transmission systems

Abstract

We have developed a high-speed low-power 6-bit digital-to-analog converter (DAC) for nextgeneration optical transmission systems. To achieve both high-speed and low-power performance, we used a simple R-2R ladder-based current-steering architecture and devised a new timing alignment technique. A DAC test chip was fabricated using our in-house InP-based heterojunction bipolar transistor (HBT) technology. It operates at a sampling rate of up to 28 giga-samples per second (GS/s) with lowpower consumption of 0.95 W and achieves a better figure of merit (0.53 pJ per conversion step) than any other previously reported DAC with a sampling rate above 20 GS/s. It also provides a clear multilevel modulated signal and can be applied to post-100-Gbit/s/ch multilevel optical transmission systems.