Ge- and III/V-CMP for Integration of High Mobility Channel Materials

Abstract

For devices beyond the 15 nm generation the introduction of high mobility channel materials is foreseen. Ge has a very high hole mobility and is thus an interesting candidate for pMOS transistors. III/V-materials have very high electron mobility and thus provide interesting candidates for nMOS transistors. In this work we present a process-flow for the integration of Ge and III/V-materials as channel materials on bulk silicon wafers. The Ge- and III/V-CMP process is a critical step for this integration approach, as excessive material needs to be removed and the surface needs to be smoothened. Ideally, the use of high mobility channel materials, in combination with a high-k material as gate oxide, will result in a significantly improved transistor performance compared to devices with Si channels. In this paper we show results of the development for the Ge- and III/V-CMP.