V-groove trench gate SiC MOSFET with a double reduced surface field junction termination extensions structure

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Abstract

We have developed V-groove trench gate SiC MOSFETs (VMOSFETs) with a double reduced surface field junction termination extensions structure (DR-JTEs) to reduce JFET resistance by using a high n-type doping density in a surface drift layer. Simulation results showed that the DR-JTEs structure for an optimized current spreading layer doping of 5 × 1016 cm-3 has a breakdown voltage that corresponds to 94% of the ideal 1D parallel-plane value. The VMOSFETs with a DR-JTEs structure demonstrated both a breakdown voltage of 1610 V and a specific on-resistance of 2.4 mΩcm2 with a threshold voltage of 5.1 V.

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Saitoh, Y., Masuda, T., Michikoshi, H., Shiomi, H., Harada, S., & Mikamura, Y. (2019). V-groove trench gate SiC MOSFET with a double reduced surface field junction termination extensions structure. Japanese Journal of Applied Physics, 58(SB). https://doi.org/10.7567/1347-4065/aaffba

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