A Temperature-Aware Framework on gm/ID-Based Methodology Using 180 nm SOI from -40 °C to 200 °C

Abstract

The advent of the Internet-of-Things brings new challenges in circuit design. The presence of circuits and sensors in harsh environments brought the need for methodologies that account for them. Since the beginning of the transistors, the temperature is known for having a significant impact on performance, and even though very low temperature sensitivity circuits have been proposed, no general methodology for designing them exists. This paper proposes a gm over Id technique for designing temperature-aware circuits that can be used either on measurement data, analytically, or based on simulation models. This model is validated using measurements up to 200°C of X-FAB XT018 transistors and later with a circuit design example.