Analog In-Memory Computing from a Memory-Agnostic Perspective: Theory, Nonidealities, and Hardware-Aware Training

Abstract

Analog in-memory computing (AIMC) executes matrix–vector multiplications (MVMs) inside memory to alleviate the von Neumann bottleneck and improve energy efficiency. This tutorial classifies AIMC circuits in a memory-agnostic way, namely, current-domain, charge-domain, charge-redistribution, capacitive-division, resistive-division, and time-domain IMC. We explain each type of AIMC circuit with simple mathematical models. Furthermore, we review key device and circuit nonidealities (e.g., process variation, IR drop, sneak paths, and I/O quantization/nonlinearity) with practical mitigation strategies in circuitry and peripherals. Finally, we organize hardware-aware training into three complementary families — probabilistic/precise modeling, physical modeling, and hardware-in-the-loop techniques — providing a mathematically grounded bridge between circuits and learning for robust, scalable AIMC accelerators.