Hardware random number generator using FPGA

Abstract

Random numbers are employed in wide range of cryptographic applications. Output of an asynchronous sampling of ring oscillators can be used as the source of randomness and Linear Hybrid CellularAutomata is used to improve the quality of random data. FPGA is an ideal platform for the implementation of random number generator for cryptographic applications. The circuit described in this paper has been implemented on a highly efficient FPGA board which generated a 32-bit random number at a frequency of 125 MHz. The generated sequence of random numbers were subjected to Diehard test and NIST test for testing randomness and found to pass these tests. These tests are a battery of statistical tests for measuring the quality of a random number generator.