Radiation hardening by design of asynchronous logic for hostile environments

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Abstract

A wide range of emerging applications is driving the development of wireless sensor node technology towards a monolithic system-on-a-chip implementation. Of particular interest are hostile environment scenarios where radiation and thermal extremes exist. Radiation hardening by design has been recognized for over a decade as an alternative open-source circuit design approach to mitigate a spectrum of radiation effects, but has significant power and area penalties. Similarly, asynchronous logic design offers potential power savings and performance improvements, with a tradeoff in design complexity and a lesser area penalty. These side effects have prevented wider acceptance of both design approaches. A case study supporting the development of monolithic system-on-a-chip wireless sensor nodes is presented. Synchronous, hardened, and asynchronous/hardened implementations of a textbook microprocessor in 0.35 $\, \mu$m austriamicrosystems SiGe BiCMOS technology are compared. The synergy of this novel asynchronous/hardened design approach is confirmed by simulation and hardware results. © 2006 IEEE.

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Barnhart, D. J., Vladimirova, T., Sweeting, M. N., & Stevens, K. S. (2009). Radiation hardening by design of asynchronous logic for hostile environments. In IEEE Journal of Solid-State Circuits (Vol. 44, pp. 1617–1628). https://doi.org/10.1109/JSSC.2009.2017005

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