Comparative study of C-V-based extraction methods of interface state density for a low-temperature polysilicon thin film

Abstract

To extract comprehensive and accurate interface state density (Dit) distribution for a low-temperature polysilicon (LTPS) thin film, three well-established methods based on capacitance-voltage (C-V ) measurements were compared: high-low frequency capacitance, conductance, and quasi-static (QS) capacitance methods. Because of the strong frequency-dependent response of grain boundary traps within the LTPS, C-V measurements are necessary on p- as well as n-type LTPS films, as they provide Dit distribution across the entire LTPS band gap. The QS capacitance method, which uses an optimal high-frequency C-V curve with a minimal grain boundary trap response, provided the best and most comprehensive estimate of Dit distribution across the LTPS band gap, even at room temperature (25 °C). Although the narrow extraction ranges ofDit were extended toward the mid-gap region by increasing the measurement temperature in both high-low frequency capacitance and conductance methods, the responses of the grain boundary traps still overestimated theDit values near the band edges.