Contiguity Representation in Page Table for Memory Management Units

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Abstract

Conventional page-based memory management schemes have certain overheads related to system performance and memory utilization mainly due to page table walks. In addition, conventional translation look-aside buffers (TLBs) often suffer from a limited capacity. To reduce these problems, we propose an efficient scheme that accommodates a contiguity information in a page table. The presented memory management unit exploits the contiguity information. As a result, we can reduce the page table walks as certain physical memory is allocated in a contiguous way. Considering the conventional scheme as a reference, the comparative performance analysis and the simulation are conducted. Experiments with image processing applications indicate that the proposed scheme can improve the memory system performance, the memory utilization, and the utilization of a TLB with insignificant complexity overheads.

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Hur, J. Y. (2019). Contiguity Representation in Page Table for Memory Management Units. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 27(1), 147–158. https://doi.org/10.1109/TVLSI.2018.2870913

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