Hardware implementation of deception detection system classifier

Abstract

Non-verbal features extracted from human face and body are considered as one of the most important indication for revealing the deception state. The Deception Detection System (DDS) is widely applied in different areas like: security, criminal investigation, terrorism detection …etc. In this study, fifteen features are extracted from each participant in the collected database. These features are related to three kinds of non-verbal features these are: facial expressions, head movements and eye gaze. The collected databased contain videos for 102 subjects and there are 888 clip related to both lie and truth response, these clips are used to train and test the system classifier. These fifteen features are placed in a single vector and applied to Support Vector Machine (SVM) classifier to classify input feature vectors into one of two classes either liar or truth-teller class. The detection accuracy of the proposed DDS based on SVM classifier was equal to 89.6396%. Finally, the hardware implementation for SVM classifier is done using the Xilinx block set. The design requires 136 slices and 263 of 4 input LUTs. Moreover, the designed classifier doesn’t require any use of both flip-flops and MULT18X18SIOs. The selected hardware platform (FPGA kit) for implementing the SVM classifier is Spartan-3A 700A