A new high-density twin-gate isolation one-time programmable memory cell in pure 28-nm CMOS logic process

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Abstract

A new and compact high-k dielectric breakdown one-time programmable (OTP) cell in pure 28-nm high-k metal gate (HKMG) process is proposed. By adopting a self-aligned twin-gate isolation (TGI) made by merged gate spacer, the new OTP cell can operate independently with a very small cell area. Fabricated by a pure 28-nm HKMG CMOS logic process, this OTP cell successfully achieves an ultrasmall cell size of 0.0441 μ m2 on 28-nm HKMG CMOS logic platform. Using high-k dielectric breakdown as its program mechanism, the antifuse TGI OTP memory has more than three orders of ON/OFF read window with a low program voltage of 4 V in 20 μ s. Furthermore, a highly density 64-kbit TGI OTP array has been fabricated and successfully demonstrates the new superior isolation and reliability performances.

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Hsiao, W. Y., Peng, P. C., Chang, T. S., Chih, Y. D., Tsai, W. C., Chang, M. F., … Lin, C. J. (2015). A new high-density twin-gate isolation one-time programmable memory cell in pure 28-nm CMOS logic process. IEEE Transactions on Electron Devices, 62(1), 121–127. https://doi.org/10.1109/TED.2014.2371617

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