Cluster refinement for block placement

Abstract

We propose an iterative optimization approach for mixed macro-cell and standard-cell placement, which minimizes the chip size and interconnection wire length at the same time. We present a branch-and-bound algorithm which efficiently searches for the optimal solution by evaluating all of the possible configurations on the selected cluster to minimize the gap distance between the ceiling and the floor. A virtual grid and permutation order are generated dynamically to eliminate redundant branches, which was the cause of much higher complexity in other approaches. Experimental results on the MCNC benchmark circuits show that the algorithm achieves very competitive results to manual design.