Towards automating simulation-based design verification using ILP

18Citations
Citations of this article
8Readers
Mendeley users who have this article in their library.
Get full text

Abstract

Increasing the productivity of simulation-based semiconductor design verification is one of the urgent challenges identified in the International Technology Roadmap for Semiconductors. The most difficult aspect is the generation of stimulus for functional coverage closure. This paper introduces a new CoverageDirected test Generation (CDG) feedback loop which applies Inductive Logic Programming (ILP) to selected tests and coverage data to induce rules that can be used to automatically direct stimulus generation towards outstanding coverage. The case study documented in this paper shows a significant reduction of simulation time when ILP-based CDG is compared to random test generation. This is an exciting and promising new application area for ILP. © Springer-Verlag Berlin Heidelberg 2007.

Cite

CITATION STYLE

APA

Eder, K., Flach, P., & Hsueh, H. W. (2007). Towards automating simulation-based design verification using ILP. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) (Vol. 4455 LNAI, pp. 154–168). Springer Verlag. https://doi.org/10.1007/978-3-540-73847-3_20

Register to see more suggestions

Mendeley helps you to discover research relevant for your work.

Already have an account?

Save time finding and organizing research with Mendeley

Sign up for free