The presence of direct current (DC) offset and harmonics-interharmonics (HIHs) in grid voltage input signal of phaselocked loop (PLL) results in inaccurate controller response. The inaccuracies are due to the low- and high-frequency oscillations that appear in the PLL estimated phase, amplitude and frequency. The suppression of fundamental frequency oscillations caused by DC offset (DO) in the input voltage signal must be carried out without compromising the dynamic response of the system. The use of low-pass filters, for example, results in undesirable, slow response. This study proposes an accurate and fast decoupling of fundamental frequency oscillations using a mathematic-cancellation decoupling cell. Higher-frequency oscillations generated by HIHs are eliminated by a different harmonic compensation network (HCN) that is also proposed in this study. The performance of conventional techniques is limited because they eliminate only specifically selected harmonics. The proposed PLL, however, eliminates any number of HIHs present in the grid with the least computational complexity and without any prior knowledge. Furthermore, its advanced features provide accurate synchronisation under any abnormal grid condition at the lowest computational complexity when compared with the existing state-of-the-art PLLs. The advanced performance of the proposed HIHDO-PLL is verified through simulation and experimental results.
Ali, Z., Christofides, N., Hadjidemetriou, L., & Kyriakides, E. (2018). Design of an advanced PLL for accurate phase angle extraction under grid voltage HIHs and DC offset. IET Power Electronics, 11(6), 995–1008. https://doi.org/10.1049/iet-pel.2017.0424