Design and synthesis of ternary CMOS logic circuits and D-element

Abstract

In this paper, a design technique for ternary logic function circuits based on CMOS design are proposed. The circuits operate as B-ternary (binaric ternary) logic functions that are useful in asynchronous systems or self-checking circuits of fault-tolerant systems. Further, a special logic circuit, D-element, is proposed. D-element is designed for asynchronous systems like Mullers C-element in binary circuits. The circuits’ SPICE simulations are provided to show their efficacy.