Abstract
The continuous-time (CT) pipelined analog-to-digital converter (ADC) is an emerging ADC architecture suitable for wide- bandwidth (BW) digitization in fully integrated receiver applications. It inherits the integration-friendly features of CT Δ Σ ADCs, such as inherent anti-aliasing, while achieving the wide- BW operation originating from discrete-time (DT) pipelined ADCs. In this review article, we introduce a gain-centric ADC model and apply the key criteria derived from the model to transform a DT pipelined ADC into a CT pipelined ADC. We then discuss the design considerations and essential building blocks of the CT pipelined ADC. Finally, we examine several implementations of this architecture with their highlights and challenges.
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CITATION STYLE
Shibata, H. (2023). Continuous-Time Pipelined ADC: A Breed of Continuous-Time ADCs for Wideband Data Conversion. IEEE Open Journal of the Solid-State Circuits Society. Institute of Electrical and Electronics Engineers Inc. https://doi.org/10.1109/OJSSCS.2023.3313579
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