Abstract
In this work, we describe a novel operation of charge-injection-induced error-free charge-based capacitance measurement (CIEF CBCM) method. This method has the simplest test structure among various CBCM methods by using only one N/PMOS pair. CIEF CBCM has the advantage of being free from charge-injection- induced errors and of efficient layout area usage. It is very suitable for industrial applications for large amounts of accurate capacitance characterizations with a limited layout area. Besides, CIEF CBCM is also implemented for investigating the impact of floating dummy metal fills on interconnect capacitance directly from silicon data. © 2006 IEEE.
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Chang, Y. W., Chang, H. W., Lu, T. C., King, Y. C., Ting, W., Ku, Y. H. J., & Lu, C. Y. (2006). Interconnect capacitance characterization using charge-injection-induced error-free (CIEF) charge-based capacitance measurement (CBCM). In IEEE Transactions on Semiconductor Manufacturing (Vol. 19, pp. 50–55). https://doi.org/10.1109/TSM.2005.863228
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