High throughput CORDIC architecture based 3D-DCT/IDCT processor

Abstract

In this paper, 8x8x8 3D-DCT/IDCT processor based on CORDIC architecture for high data rate of image processing and video coding with reduced hardware has been presented. It uses two stages of CORDIC DCT processor i.e. one is 1D-DCT and another one is 2D-DCT processor based on fully pipelined unfolded CORDIC architecture with RAM buffer. The one-dimensional DCT is useful in processing of speech waveforms. For images and video signal processing, we need a 3D version of the DCT/IDCT data, especially in coding for compression and decompression, for its best performance. This processor performs both the DCT and IDCT simultaneously with the help of CORDIC algorithm of both 3D-DCT and IDCT which has boost the speed of the processor. Ease the use of less computation based unfolded CORDIC architecture in the processor reduces complexity and power consumption. With the working frequency approximately 414 MHz less power dissipation, low latency and high throughput can be obtained. The processor has been implemented on Xilinx ISE 14.7 and design is simulated in DE-2 board. This processor has not only reduces the complication but also increases the speed which lead to broad use in image and video processing.