Improvement of electrical performance in heterostructure junctionless TFET based on dual material gate

Abstract

In this paper, a dual metallic material gate heterostructure junctionless tunnel field-effect transistor (DMMG-HJLTFET) is proposed and investigated. We use the Si/SiGe heterostructure at the source/channel interface to improve the band to band tunneling (BTBT) rate, and introduce a sandwich stack (GaAs/Si/GaAs) at the drain region to suppress the OFF-state current and ambiplolar current. Simultaneously, to further decrease ambipolar current, the gate electrode is divided into three parts namely auxiliary gate (M1), control gate (M2), and tunnel gate (M3) with workfunctions FM1, FM2 and FM3, respectively, where FM1 = FM3 ≤ FM2. Simulation results indicate that DMMG-HJLTFET provides superior performance in terms of logic and analog/RF as compared with other possible combinations, the ON-state current of the DMMG-HJLTFET increases up to 9.04 (vector multiplication) 10-6 A/μm, and the maximum gm (which determine the analog performance of devices) of DMMG-HJLTFET is 1.11 (vector multiplication) 10-5 S/μm at 1.0V drain-to-source voltage (Vds). Meanwhile, RF performance of devices depends on the cut-off frequency (fT) and gain bandwidth (GBW), and DMMG-HJLTFET could achieve a maximum fT of 5.84 GHz, and a maximum GBW of 0.39 GHz, respectively.