Low-Voltage Implementation of Neuromorphic Circuits for a Spike-Based Learning Control Module

Abstract

Recent brain emulation engines have been configured using thousands of neurons and billions of synapses. These components make a significant impact on the whole system in terms of power consumption and silicon area. In this work, several upgraded neuromorphic circuits are used to configure an efficient and compact spike-based learning control module that is capable of operating under ultralow-voltage supplies offering a low energy consumption per spike. In this way, a conductance-based silicon neuron is developed using the simplest highly efficient analog circuits. Moreover, an upgraded winner-take-all (WTA) circuit is used to form a low-voltage multi-threshold current comparator to determine whether to increase or decrease the synaptic weight. Other components such as low-speed amplifier, differential pair integrator (DPI)-based synapse, and weight update controller are designed such that they properly operate under a 0.5V supply voltage. Simulation results in TSMC 0.18 μ m CMOS process show an energy consumption of 2.5 pJ for the upgraded learning control module, while its stop-learning mechanism improves the performance of the system by avoiding overfitting.